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ISCA2024顶会

Counter-light Memory Encryption

Xin Wang, Jagadish Kotra, Alex Jones, Wenjie Xiong, Xun Jian

2024年份
5被引次数
3顶会引用

摘要

Unlike the well-known counter mode memory encryption (e.g., SGX1), more recent memory encryption (e.g., SGX2, SEV) has no counters. Without accessing any counters, such counterless memory encryption improves performance over counter mode encryption and gains wide adoption as a result.

Counterless encryption, however, still incurs a costly performance overhead. Under counterless encryption, the cipher calculations take data as their direct inputs. As such, the ciphers for decrypting data can only be calculated sequentially after the missing data arrive from memory; this requires every last-level cache miss to stall on the cipher calculations after the needed data arrive from memory. Our real-system measurements find counterless encryption can slow down irregular workloads by 9%, on average.

We observe while counter mode encryption incurs costly memory access overhead, its cipher calculations can often complete before data arrive because they take counters as input, instead of data, and counters can fit on-chip much better than data. As such, we explore how to combine both modes of encryption to achieve the best of both worlds -the efficient memory accesses of counterless encryption and fast cipher calculations of counter mode encryption. For irregular workloads, our proposed memory encryption -Counter-light Encryption -achieves 98% the average performance of no memory encryption. When memory bandwidth is starved, Counter-light Encryption is slower than counterless encryption by only 1.4% in the worst case. LLC Read Miss LLC Writeback Protects Against Memory Overhead Counterless No overhead accesses; Always calculate cipher after data arrives. No overhead accesses. Physical (or software) probing and nonreplay-based tampering. No memory overhead. Counter-light (Our work) No overhead accesses; Calculate cipher after data arrives only if counter misses in AES memoization table. Overhead accesses only in epochs with spare bandwidth. Same as counterless; also faces the same consequences under replay attacks. Same as counter mode. Counter mode Always access counters; Calculate cipher after data arrives only if counter misses in AES memoization table. Always access counters. Physical (or software) probing and all tampering including replay. 1.6% of memory, assuming split counters design.

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