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PLDI2023顶会

Modular Hardware Design with Timeline Types

Rachit Nigam, Pedro Henrique Azevedo de Amorim, Adrian Sampson

2023年份
16被引次数
8顶会引用

摘要

Modular design is a key challenge for enabling large-scale reuse of hardware modules. Unlike software, however, hardware designs correspond to physical circuits and inherit constraints from them. Timing constraintswhich cycle a signal arrives, when an input is read-and structural constraints-how often a multiplier accepts new inputs-are fundamental to hardware interfaces. Existing hardware design languages do not provide a way to encode these constraints; a user must read documentation, build scripts, or in the worst case, a module's implementation to understand how to use it. We present Filament, a language for modular hardware design that supports the specification and enforcement of timing and structural constraints for statically scheduled pipelines. Filament uses timeline types, which describe the intervals of clock-cycle time when a given signal is available or required. Filament enables safe composition of hardware modules, ensures that the resulting designs are correctly pipelined, and predictably lowers them to efficient hardware.

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