CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design
Wenji Fang, Shang Liu, Jing Wang, Zhiyao Xie
摘要
The rapid advancements of AI rely on the support of integrated circuits (ICs). However, the growing complexity of digital ICs makes the traditional IC design process costly and time-consuming. In recent years, AI-assisted IC design methods have demonstrated great potential, but most methods are task-specific or focus solely on the circuit structure in graph format, overlooking other circuit modalities with rich functional information. In this paper, we introduce CircuitFusion, the first multimodal and implementation-aware circuit encoder. It encodes circuits into general representations that support different downstream circuit design tasks. To learn from circuits, we propose to fuse three circuit modalities: hardware code, structural graph, and functionality summary. More importantly, we identify four unique properties of circuits: parallel execution, functional equivalent transformation, multiple design stages, and circuit reusability. Based on these properties, we propose new strategies for both the development and application of CircuitFusion: 1) During circuit preprocessing, utilizing the parallel nature of circuits, we split each circuit into multiple sub-circuits based on sequential-element boundaries, each sub-circuit in three modalities. It enables fine-grained encoding at the sub-circuit level. 2) During CircuitFusion pre-training, we introduce three self-supervised tasks that utilize equivalent transformations both within and across modalities. We further utilize the multi-stage property of circuits to align representation with ultimate circuit implementation. 3) When applying CircuitFusion to downstream tasks, we propose a new retrieval-augmented inference method, which retrieves similar known circuits as a reference for predictions. It improves fine-tuning performance and even enables zero-shot inference. Evaluated on five different circuit design tasks, CircuitFusion consistently outperforms the stateof-the-art supervised method specifically developed for every single task, demonstrating its generalizability and ability to learn circuits' inherent properties 1 .
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引用它的顶会 Paper4
- NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed GraphWenji Fang, Wenkai Li, Shang Liu, Yao Lu 等DAC 2025 · 被引用 10 次
- VeriLoC: Line-of-Code Level Prediction of Hardware Design Quality from Verilog CodeRaghu Vamshi Hemadri, Jitendra Bhandari, Andre Nakkab, Johann Knechtel 等NeurIPS 2025 · 被引用 9 次
- Topology Matters in RTL Circuit Representation LearningMingyu Zhao, Xun He, Jiawei Liu, Jianwang Zhai 等ICLR 2026
- UniRTL: Unifying Code and Graph for Robust RTL Representation LearningYi Liu, Hongji Zhang, Lei Chen, Mingxuan Yuan 等ICML 2026
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