SysScale: Exploiting Multi-domain Dynamic Voltage and Frequency Scaling for Energy Efficient Mobile Processors
Jawad Haj-Yahya, Mohammed Alser, Jeremie S. Kim, Abdullah Giray Yaglikçi, Nandita Vijaykumar, Efraim Rotem, Onur Mutlu
Abstract
There are three domains in a modern thermally-constrained mobile system-on-chip (SoC): compute, IO, and memory. We observe that a modern SoC typically allocates a fixed power budget, corresponding to worst-case performance demands, to the IO and memory domains even if they are underutilized. The resulting unfair allocation of the power budget across domains can cause two major issues: 1) the IO and memory domains can operate at a higher frequency and voltage than necessary, increasing power consumption and 2) the unused power budget of the IO and memory domains cannot be used to increase the throughput of the compute domain, hampering performance. To avoid these issues, it is crucial to dynamically orchestrate the distribution of the SoC power budget across the three domains based on their actual performance demands.
We propose SysScale, a new multi-domain power management technique to improve the energy efficiency of mobile SoCs. SysScale is based on three key ideas. First, SysScale introduces an accurate algorithm to predict the performance (e.g., bandwidth and latency) demands of the three SoC domains. Second, SysScale uses a new DVFS (dynamic voltage and frequency scaling) mechanism to distribute the SoC power to each domain according to the predicted performance demands. This mechanism is designed to minimize the significant latency overheads associated with applying DVFS across multiple domains. Third, in addition to using a global DVFS mechanism, SysScale uses domain-specialized techniques to optimize the energy efficiency of each domain at different operating points.
We implement SysScale on an Intel Skylake microprocessor for mobile devices and evaluate it using a wide variety of SPEC CPU2006, graphics (3DMark), and battery life workloads (e.g., video playback). On a 2-core Skylake, SysScale improves the performance of SPEC CPU2006 and 3DMark workloads by up to 16% and 8.9% (9.2% and 7.9% on average), respectively. For battery life workloads, which typically have fixed performance demands, SysScale reduces the average power consumption by up to 10.7% (8.5% on average), while meeting performance demands.
Ask about this paper
Your agent reads all of it.
Lune indexed this paper to the last equation, along with the top-tier papers that cite it. Ask a question and the answer quotes them.
Your agent calls
Luneget_paper_fulltext
Free to start. No credit card required.
Terminal
Install the CLIlune papers fulltext df0abf9a-41f3-45ed-803d-d484af3b9371Cited by top-tier papers7
- FIGARO: Improving System Performance via Fine-Grained In-DRAM Data Relocation and CachingYaohua Wang, Lois Orosa, Xiangjun Peng, Yang Guo et al.MICRO 2020 · 72 citations
- A Workload-Aware DVFS Robust to Concurrent Tasks for Mobile DevicesChengdong Lin, Kun Wang, Zhenjiang Li, Yu PuMobiCom 2023 · 52 citations
- CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and OptimizationsLois Orosa, Yaohua Wang, Mohammad Sadrosadati, Jeremie S. Kim et al.ISCA 2021 · 26 citations
- AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server ApplicationsJawad Haj-Yahya, Haris Volos, Davide B. Bartolini, Georgia Antoniou et al.MICRO 2022 · 22 citations
- IChannels: Exploiting Current Management Mechanisms to Create Covert Channels in Modern ProcessorsJawad Haj-Yahya, Lois Orosa, Jeremie S. Kim, Juan Gómez-Luna et al.ISCA 2021 · 19 citations
Related papers
- CRAVE: Analyzing Cross-Resource Interaction to Improve Energy Efficiency in Systems-on-ChipDipayan Mukherjee, Sam Hachem, Jeremy Bao, Curtis Madsen et al.EuroSys 2025 · 2 citations
- SmartBoost: Lightweight ML-Driven Boosting for Thermally-Constrained Many-Core ProcessorsMartin Rapp, Mohammed Bakr Sikal, Heba Khdr, Jörg HenkelDAC 2021 · 18 citations
- Machine Learning-based Thermally-Safe Cache Contention Mitigation in Clustered ManycoresMohammed Bakr Sikal, Heba Khdr, Martin Rapp, Jörg HenkelDAC 2023 · 7 citations
- FlexWatts: A Power- and Workload-Aware Hybrid Power Delivery Network for Energy-Efficient MicroprocessorsJawad Haj-Yahya, Mohammed Alser, Jeremie S. Kim, Lois Orosa et al.MICRO 2020 · 12 citations
- A Cross-Layer Power and Timing Evaluation Method for Wide Voltage ScalingWenjie Fu, Leilei Jin, Ming Ling, Yu Zheng et al.DAC 2020 · 5 citations
