TDMSim: Enabling High-Density and Energy-Efficient GPU DRAM Caches with 2D-Materials for Data-Intensive Applications
Chao Fu, Jingyang Zheng, Xinliu He, Xiangqi Dong, Zheng Cao, Yuning Zhan, Wenzhong Bao, Peng Zhou, Jun Han
Abstract
Modern GPUs provision increasingly large last-level caches (LLCs) to sustain the high data-reuse demands of artificial intelligence and high-performance computing workloads. As capacity scales, conventional cache designs are fundamentally constrained by a tightly coupled trade-off among density, access latency, and energy. Two-dimensional (2D) materials, with intrinsically low leakage current and atomic-scale thickness, offer a promising approach for building high-density, energy-efficient cache arrays. However, architects lack a cross-level design methodology that can propagate device-level characteristics of 2D materials into quantitative architectural guidance, leaving the system-level potential of 2D-material caches unexplored. To this end, we present TDMSim, a validated cross-level simulation toolkit that bridges transistor-level, circuit-level, and system-level modeling for 2D-material-based architectures. Based on this toolkit, we integrate 2D-material DRAM cache designs into a CPU-GPU system, and propagate the intrinsic retention-time variability of 2D-material arrays to system-level metrics. To mitigate the impact of this variability, we design a retention-aware policy that steers 2D-material DRAM caches toward their ideal performance limit, achieving a 75.6% reduction in access interference rate and a 65.4% reduction in refresh energy. We evaluate the above proposed 2D-material DRAM caches under realistic GPU workloads, observing a 79.4% reduction in energy consumption alongside a 42.1% improvement in system performance under the same area budget as an SRAM cache. Moreover, 2D-material DRAM caches deliver 25.4% higher performance and 42.7% lower energy consumption than conventional DRAM caches with state-of-the-art optimizations. TDMSim will be released as open source to foster cross-level research on emerging 2D materials and to establish device-aware modeling as a general methodology for future 2D-material-based architectures.
Ask about this paper
Ask your agent about it.
Lune has read the top-tier papers around this one, so every answer names the papers it rests on.
Related papers
- CDAR-DRAM: An In-situ Charge Detection and Adaptive Data Restoration DRAM Architecture for Performance and Energy Efficiency ImprovementChuxiong Lin, Weifeng He, Yanan Sun, Zhigang Mao et al.DAC 2021 · 6 citations
- NeRArch-Sim: A Unified Simulator for Benchmarking and DSE of Neural Rendering AcceleratorsCheng-Jhih Shih, Chaojian Li, Chihao Yu, Hsuan-Chen Fang et al.ISCA 2026
- Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)Sukarn Agarwal, Shounak Chakraborty, Magnus SjälanderDAC 2023 · 4 citations
- A Full-system, Programmable, and Extensible In-Memory Computing Simulation Framework for Deep LearningKaining Zhou, Jian Huang, Nam Sung Kim, Naresh ShanbhagDAC 2025
- 333-eDRAM - 3T Embedded DRAM Leveraging Monolithic 3D Integration of 3 Transistor Types: IGZO, Carbon Nanotube and Silicon FETsDavid Kong, Shvetank Prakash, Jedrzej Kufel, Georgios Kyriazidis et al.DAC 2025 · 4 citations
