Fault-Tolerance-Oriented Physical Design for Fully Programmable Valve Array Biochips

As a new generation of flow-based microfluidics, the Fully Programmable Valve Array (FPVA) biochips have become a popular biochemical experimental platform that provide higher flexibility and programmability. Due to environmental and human factors, however, there are usually some physical faults in the manufacturing process such as channel blockage and leakage, which, undoubtedly, can affect the results of bioassays and even cause execution failure. Accordingly, we focus on the fault-tolerant design of FPVA biochips for the first time in this paper, and present three dynamic fault-tolerant techniques including a cell function conversion method, a bidirectional redundancy scheme, and a fault mapping method. By integrating these techniques into the component placement and channel routing stages, we further realize an efficient and effective fault-tolerance-oriented physical design approach for FPVA biochips, thus ensuring the robustness of chip architecture and correctness of assay outcomes. Experimental results on multiple benchmarks confirm that the proposed approach can generate fault-tolerant FPVA architectures with both high execution efficiency and low fabrication cost.