Beyond Page Migration: Enhancing Tiered Memory Performance via Integrated Last-Level Cache Management and Page Migration
Hwanjun Lee, Minho Kim, Yeji Jung, Seonmu Oh, Ki-Dong Kang, Seunghak Lee, Daehoon Kim
摘要
Emerging memory interconnect technologies, such as Compute Express Link (CXL), enable scalable memory expansion by integrating heterogeneous memory components like local DRAM and CXL-attached DRAM.These tiered memory systems offer potential benefits in bandwidth and capacity, but their heterogeneous performance characteristics pose significant challenges for efficient memory management.Traditional approaches, including hotnessbased page placement, prioritize latency reduction by retaining frequently accessed data in near memory.However, these methods often fail to utilize aggregate memory bandwidth effectively, leading to imbalanced traffic and performance degradation under memoryheavy workloads.Additionally, the reliance on costly page migrations introduces overheads that impede responsiveness to workload variations.To address these challenges, we propose TierTune, a dynamic memory management framework integrating Last-Level Cache (LLC) partitioning and page migration.TierTune dynamically partitions the LLC between near and far memory nodes, rapidly mitigating latency imbalances and balancing memory traffic more effectively than software-based page migration.We extend this approach with a migration policy that dynamically redistributes pages to address persistent imbalances, incorporating cache hierarchy effects and bandwidth pressure into placement decisions.Experimental evaluations demonstrate that TierTune improves performance by 19.6% on average compared to state-of-the-art page migration policies across diverse workloads by balancing memory traffic more effectively and reducing migration overheads.
问问这篇 Paper
问问你的智能体。
Lune 读过与它相关的顶会 Paper,每个回答都会注明依据哪几篇。
引用它的顶会 Paper2
- PACT: A Criticality-First Design for Tiered MemoryHamid Hadian, Jinshu Liu, Hanchen Xu, Hansen Idden 等ASPLOS 2026 · 被引用 2 次
- Performance Predictability in Heterogeneous MemoryJinshu Liu, Hanchen Xu, Daniel S. Berger, Marcos K. Aguilera 等ASPLOS 2026 · 被引用 1 次
相关 Paper
- M5: Mastering Page Migration and Memory Management for CXL-based Tiered Memory SystemsYan Sun, Jongyul Kim, Zeduo Yu, Jiyuan Zhang 等ASPLOS 2025 · 被引用 27 次
- NeoMem: Hardware/Software Co-Design for CXL-Native Memory TieringZhe Zhou, Yiqi Chen, Tao Zhang, Yang Wang 等MICRO 2024 · 被引用 17 次
- HybridTier: an Adaptive and Lightweight CXL-Memory Tiering SystemKevin Song, Jiacheng Yang, Zixuan Wang, Jishen Zhao 等ASPLOS 2025 · 被引用 14 次
- PIPM: Partial and Incremental Page Migration for Multi-host CXL Disaggregated Shared MemoryGangqi Huang, Heiner Litz, Yuanchao XuASPLOS 2026 · 被引用 1 次
- TPP: Transparent Page Placement for CXL-Enabled Tiered-MemoryHasan Al Maruf, Hao Wang, Abhishek Dhanotia, Johannes Weiner 等ASPLOS 2023 · 被引用 255 次
