Reconfiguring Scalable Hashing with Persistent CPU Caches

As an essential functionality in main memory system, the extendible hash index exhibits both low latency and instant recovery with the persistent memory (PM). The recently released eADR feature of PM further provides an opportunity to enhance write performance of extendible hash index. Compared to the previous generation ADR, eADR avoids inefficient manual flush and mitigates write amplification by including CPU cache into the persistent domain. However, existing PM-based hash indexes are either designed without the enhancement of eADR, or fail to effectively leverage the persistent CPU cache. On the one hand, although using DRAM as a buffer helps mitigate write amplification, its shared usage of the CPU cache with PM leads to severe cache contention. On the other hand, skewed access towards metadata leads to inefficient CPU cache utilization. We propose PIONEER, an eADR-friendly persistent extendible hash index for a hybrid DRAM-PM memory architecture. First, to alleviate cache contention during data persistence, PIONEER introduces the directory snapshot that employs non-temporal write to bypass the CPU cache while preserving crash consistency guarantees. Second, PIONEER enhances the CPU cache utilization by re-designing the layout of hash index in a metadataseparated manner. In addition, PIONEER proposes a data-aware persistence strategy that dynamically adjusts the persistence approach for each segment based on data hotness. Extensive experiments conducted with YCSB workloads demonstrate that PIONEER achieves up to $36.4 \times$ higher write performance compared to other state-of-the-art persistent hash indexes.