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USENIX Security2023顶会

On the Feasibility of Malware Unpacking via Hardware-assisted Loop Profiling

Binlin Cheng, Erika A. Leal, Haotian Zhang, Jiang Ming

出版方
2023年份
3顶会引用

摘要

Hardware Performance Counters (HPCs) are built-in registers of modern processors to count the occurrences of various micro-architectural events. Measuring HPCs values is a cost-effective way to characterize dynamic program behaviors. Because of the ease of use and tamper-resistant advantages, using HPCs coupled with machine learning models to address security problems is on the rise in recent years. However, lately the suitability of HPCs for security has been questioned in light of the non-determinism concerns: measurement errors caused by interrupt skid and time-division multiplexing can undermine the effectiveness of using HPCs in security applications.

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