Queue-Mem: Energy-Efficient Hardware Storage for Advanced Network Function Acceleration

General-purpose CPU servers have been widely used to deploy Network Functions (NFs) thanks to their high flexibility and simplicity of deployment. Due to their high energy consumption, best practices advocate for only processing packet headers on CPU cores while temporary storing the corresponding packet payloads on either network interface cards or external RDMA-enabled memory.

We show that the seemingly minor decision of where to store a packet payload greatly impacts overall energy consumption in state-of-the-art NF systems operating at terabit-per-second speeds. In fact, we show that if one could ideally store packet payloads on today's hardware switches, while processing headers externally, one could reduce energy use by 1.8× to 10.9× compared to current practices.

In this paper, we introduce QUEUE-MEM, a generalpurpose, energy-efficient storage solution to enhance NF deployment that is amenable for implementation with various existing hardware switches. Building QUEUE-MEM involves addressing significant challenges associated with payload storage, as hardware switches lack such functionality. By carefully exploiting the buffer queues of existing switches, we are the first ones to build and showcase a robust, energyefficient packet processing pipeline capable of handling terabit-per-second speeds and supporting advanced per-flow network functions, all while using just a single commodity server connected to an ASIC switch.