ParetoES: Hardware-Accelerated Sparse Embedding Similarity via Pareto-Optimal Pruning

Efficient retrieval of sparse embeddings, a critical task in modern information systems, is fundamentally challenged by the memory-bound nature of Top-K sparse matrix-vector multiplication (SpMV). Existing solutions often pursue full computation for absolute accuracy, which is not Pareto-optimal and results in excessive memory transfers and redundant work. We propose ParetoES, an FPGA-accelerated retrieval system that adopts a selective computation strategy to optimize the trade-off between recall and throughput. ParetoES integrates algorithmic and architectural co-design, featuring: (1) a Spherical K-means++ Refine algorithm that combines clustering, low-bit quantization, and unstructured pruning to reduce the candidate search space and memory access overhead; (2) a Hierarchical HotspotBalancing $(H^{2}$ Balance) strategy to mitigate workload skew in multicore environments; and (3) a lightweight Adaptive Cluster Probing Engine (ACPE) architecture with distributed microsorters to enable flexible, high-throughput retrieval. Experiments on five datasets show that when maintaining Recall@100 > 0.8, ParetoES achieves up to $\mathbf{5 4 0} \times$ and $\mathbf{7 9} \times$ higher Queries Per Second (QPS) than CPU and GPU baselines, respectively. It also demonstrates an average throughput improvement of $2.27 \times$ over the state-of-the-art FPGA accelerator.