FALA: Locality-Aware PIM-Host Cooperation for Graph Processing with Fine-Grained Column Access

Graph processing is fundamental and critical to various domains, such as social networks and recommendation systems.However, its irregular memory access patterns incur significant memory bottlenecks on modern DRAM architectures, optimized for sequential access.To address this challenge, various approaches with cache and processing-in-memory (PIM) have been explored.Cache-based approaches target efficiently utilizing the cache by improving locality through graph tiling.However, a discrepancy between burst size and data makes them suffer from redundant memory accesses.PIM leverages high internal memory bandwidth but fails to exploit cache locality, showing inefficiencies in workloads with high data reuse.Hybrid approaches attempt to combine both techniques but still face limitations since they struggle with overfetching and inefficient cache utilization when vertex data has low reuse.To this end, we propose FALA, a novel hybrid architecture that synergistically integrates PIM and cache-based acceleration to overcome these limitations.FALA introduces a fine-grained column access mechanism within memory banks and a locality-aware PIM architecture to enhance memory efficiency and cache utilization.Our design minimizes unnecessary memory access while fully utilizing both high internal bandwidth and on-chip caches.We evaluate FALA against state-of-the-art cache-based, PIM, and hybrid graph processing accelerators.Experimental results demonstrate that FALA achieves 1.56× speedup and reduces energy consumption by 35.3% in geometric mean, compared to the prior art.