LTD: Low-Overhead Topology Discovery using Programmable Data Planes

Programmable networks are a revolutionary network paradigm that is widely deployed in modern data centers and enterprise networks. In programmable networks, topology discovery is responsible for building a global visibility of the data-plane topology, serving as the foundation of other key applications. However, existing topology discovery methods heavily rely on controllers to process massive LLDP packets, causing severe overhead that increases linearly with link changes. In this paper, we propose LTD, the first mechanism offloading core topology discovery to programmable data planes. LTD adopts three key strategies: three-layered maximum offloading that distributes tasks across switch ASIC, OS, and controller; an OS-ASIC co-driven mechanism that utilizes the characteristics of programmable switches to achieve periodic link change identification; and a plug-and-play data structure for seamless topology view updates. We conduct extensive evaluations on real-world topologies and hardware switches, and compare LTD with state-of-the-art methods. The results show that LTD achieves full link coverage, significantly reduces controller CPU consumption and TCP buffer occupancy (by 90% - 99%), and realizes high scalability (sublinear overhead increase with link changes).