FALCON: An ML Framework for Fully Automated Layout-Constrained Analog Circuit Design
Asal Mehradfar, Xuzhe Zhao, Yilun Huang, Emir Ceyani, Yankai Yang, Shihao Han, Hamidreza Aghasi, Salman Avestimehr
摘要
Designing analog circuits from performance specifications is a complex, multi-stage process encompassing topology selection, parameter inference, and layout feasibility. We introduce FALCON, a unified machine learning framework that enables fully automated, specification-driven analog circuit synthesis through topology selection and layout-constrained optimization. Given a target performance, FALCON first selects an appropriate circuit topology using a performance-driven classifier guided by human design heuristics. Next, it employs a custom, edge-centric graph neural network trained to map circuit topology and parameters to performance, enabling gradient-based parameter inference through the learned forward model. This inference is guided by a differentiable layout cost, derived from analytical equations capturing parasitic and frequency-dependent effects, and constrained by design rules. We train and evaluate FALCON on a large-scale custom dataset of 1M analog mm-wave circuits, generated and simulated using Cadence Spectre across 20 expert-designed topologies. Through this evaluation, FALCON demonstrates >99% accuracy in topology inference, <10% relative error in performance prediction, and efficient layout-aware design that completes in under 1 second per instance. Together, these results position FALCON as a practical and extensible foundation model for end-to-end analog circuit design automation. Our code and dataset are publicly available at https://github.com/AsalMehradfar/FALCON.
问问这篇 Paper
智能体会读完全文。
Lune 把这篇 Paper 索引到了每一个公式,引用它的顶会 Paper 也一样。你提问,回答直接引用原文。
它引用的顶会 Paper5
- GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement LearningHanrui Wang, Kuan Wang, Jiacheng Yang, Linxiao Shen 等DAC 2020 · 被引用 326 次
- AnalogCoder: Analog Circuit Design via Training-Free Code GenerationYao Lai, Sungyoung Lee, Guojin Chen, Souradip Poddar 等AAAI 2025 · 被引用 105 次
- LaMAGIC: Language-Model-based Topology Generation for Analog Integrated CircuitsChen-Chia Chang, Yikang Shen, Shaoze Fan, Jing Li 等ICML 2024 · 被引用 39 次
- Learning to Design Analog Circuits to Meet Threshold SpecificationsDmitrii Krylov, Pooya Khajeh, Junhan Ouyang, Thomas Reeves 等ICML 2023 · 被引用 13 次
- CktGNN: Circuit Graph Neural Network for Electronic Design AutomationZehao Dong, Weidong Cao, Muhan Zhang, Dacheng Tao 等ICLR 2023 · 被引用 12 次
相关 Paper
- Domain knowledge-infused deep learning for automated analog/radio-frequency circuit parameter optimizationWeidong Cao, Mouhacine Benosman, Xuan Zhang, Rui MaDAC 2022 · 被引用 30 次
- Performance-driven Analog Routing via Heterogeneous 3DGNN and Potential RelaxationPeng Xu, Guojin Chen, Keren Zhu, Tinghuan Chen 等DAC 2024 · 被引用 7 次
- Graph-Transformer-based Surrogate Model for Accelerated Converter Circuit Topology DesignShaoze Fan, Haoshu Lu, Shun Zhang, Ningyuan Cao 等DAC 2024 · 被引用 9 次
- CDLS: Constraint Driven Generative AI Framework for Analog Layout SynthesisPrasanth Mangalagiri, Lynn Qian, Farrukh Zafar, Praveen Mosalikanti 等DAC 2024 · 被引用 2 次
- OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset GenerationGiuseppe Chiari, Michele Piccoli, Davide ZoniICLR 2026 · 被引用 4 次
