Formal Verification of a JavaCard Virtual Machine with Frama-C
Adel Djoudi, Martin Hána, Nikolai Kosmatov
摘要
Formal verification of real-life industrial software remains a challenging task. It provides strong guarantees of correctness, which are particularly important for security-critical products, such as smart cards. Security of a smart card strongly relies on the requirement that the underlying JavaCard virtual machine ensures necessary isolation properties. This case study paper presents a recent formal verification of a JavaCard Virtual Machine implementation performed by Thales using the Frama-C verification toolset. This is the first verification project for such a large-scale industrial smart card product where deductive verification is applied on the real-life C code. The target properties include common security properties such as integrity and confidentiality. The implementation contains over 7,000 lines of C code. After a formal specification in the ACSL specification language, over 52,000 verification conditions were generated and successfully proved. We present several issues identified during the project, illustrate them by representative examples and present solutions we used to solve them. Finally, we describe proof results, some lessons learned and desired tool improvements.
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- Neural Theorem Proving for Verification Conditions: A Real-World BenchmarkQiyuan Xu, Xiaokun Luan, Renxi Wang, Joshua Ong Jun Leang 等ICLR 2026 · 被引用 6 次
- A Tale of 1001 LoC: Potential Runtime Error-Guided Specification Synthesis for Verifying Large-Scale ProgramsZhongyi Wang, Tengjie Lin, Mingshuai Chen, Haokun Li 等OOPSLA 2026 · 被引用 1 次
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