Power-Grid Structure Exploration with Unified Sequence-based Learning Framework

As increasing gap of the shrinking ratio between device and metal pitches under advanced nodes, power-grid (PG) structure plays a critical role in circuit performance considering power integrity. Initial PG structures, as initiating implementation fundamentals, dominate optimization space. To address initial structures on industrial flow, we propose the first unified framework fueled by novel sequence-based structure generator and Transformer-based predictor, providing accurate static voltage-drop estimation. Learned embeddings are then adopted to determine promising candidates with Pareto frontier during structure optimization. The predictor is demonstrated in different scenarios under 3 nm and 2 nm technology with average 0.011% maximum absolute error of drop percentage while the optimized structures reduce 15% PG utilization with 34% worst timing-slack improvement on industrial designs.