Scaling Learning-based Packet Classification Hardware with NeuTree
Jiashuo Yu, Longlong Zhu, Long Huang, Xinyang Chen, Linying Zheng, Dong Zhang, Xiang Chen, Chunming Wu
Abstract
Learning-based packet classification (LPC) methods tackle the challenge of increased network rules by learned data structures to minimize memory usage. Hence, LPC shows promise in enabling resource-constrained network devices (e.g., switches and NICs) to handle large-scale rules. However, existing LPC methods involve floating-point computations, which ASICs in high-speed network devices cannot support. In this paper, we propose NeuTree, scaling packet classification on hardware by revising the LPC structure with binarized computation. We introduce the recursive binarized model index (RBMI) structure, enabling non-floating computation and low resource consumption. Meanwhile, we design the division scheme for preprocessing rules that enables packets to be matched in multiple RBMIs in parallel to maintain high-speed classification. The experiment shows that the memory consumption of NeuTree is competitive to the state-of-the-art LPC method, with floating-point operations reduced from 81.11% to 0% and less than 1% construction time. Further, we verify NeuTree on NetFPGA SUME with a throughput of 120.48Mpps.
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