Execution Dependence Extension (EDE): ISA Support for Eliminating Fences
Thomas Shull, Ilias Vougioukas, Nikos Nikoleris, Wendy Elsasser, Josep Torrellas
Abstract
Fence instructions are a coarse-grained mechanism to enforce the order of instruction execution in an out-of-order pipeline. They are an overkill for cases when only one instruction must wait for the completion of one other instruction. For example, this is the case when performing undo logging in Non-Volatile Memory (NVM) systems: while the update of a variable needs to wait until the corresponding undo log entry is persisted, all other instructions can be reordered. Unfortunately, current ISAs do not provide a way to describe such an execution dependence between two instructions that have no register or memory dependences. As a result, programmers must place fences, which unnecessarily serialize many unrelated instructions.To remedy this limitation, we propose an ISA extension capable of describing these execution dependences. We call the proposal Execution Dependence Extension (EDE), and add it to Arm’s AArch64 ISA. We also present two hardware realizations of EDE that enforce execution dependences at different stages of the pipeline: one in the issue queue (IQ) and another in the write buffer (WB). We implement IQ and WB in a simulator and test them with several NVM applications. Overall, by using EDE with IQ and WB rather than fences, we attain average workload speedups of 18% and 26%, respectively.
Ask about this paper
Ask your agent about it.
Lune has read the top-tier papers around this one, so every answer names the papers it rests on.
Your agent calls
Lunesearch_papers
Free to start. No credit card required.
Terminal
Install the CLIlune papers get c81c63da-b3f1-4e20-ba9d-d4a40f18c9a9Cited by top-tier papers3
- SpecPMT: Speculative Logging for Resolving Crash Consistency Overhead of Persistent MemoryChencheng Ye, Yuanchao Xu, Xipeng Shen, Yan Sha et al.ASPLOS 2023 · 13 citations
- Free atomics: hardware atomic operations without fencesAshkan Asgharzadeh, Juan M. Cebrian, Arthur Perais, Stefanos Kaxiras et al.ISCA 2022 · 13 citations
- Reconciling Selective Logging and Hardware Persistent Memory TransactionChencheng Ye, Yuanchao Xu, Xipeng Shen, Yan Sha et al.HPCA 2023 · 4 citations
Related papers
- (Almost) Fence-less Persist OrderingSara Mahdizadeh-Shahri, Seyed Armin Vakil-Ghahani, Aasheesh KolliMICRO 2020 · 15 citations
- Lazy Release PersistencyMahesh Dananjaya, Vasilis Gavrielatos, Arpit Joshi, Vijay NagarajanASPLOS 2020 · 12 citations
- No Rush in Executing Atomic InstructionsAshkan Asgharzadeh, Josué Feliu, Manuel E. Acacio, Stefanos Kaxiras et al.HPCA 2025
- Revamping hardware persistency models: view-based and axiomatic persistency models for Intel-x86 and Armv8Kyeongmin Cho, Sung-Hwan Lee, Azalea Raad, Jeehoon KangPLDI 2021 · 24 citations
- ASAP: A Speculative Approach to PersistenceSujay Yadalam, Nisarg Shah, Xiangyao Yu, Michael M. SwiftHPCA 2022 · 17 citations
