On the Regularity of the Generalized Birthday Problem
Lili Tang, Yao Sun, Xiaorui Gong
Abstract
The Generalized Birthday Problem (), which seeks hash values from lists whose XOR is zero, is a fundamental problem across multiple cryptographic domains. While the -list has been extensively studied, many schemes including (NDSS'16) utilize a single-list variant (selecting hash values from a single list) without clear theoretical grounding. Our work reveals that the -list implicitly exhibits a regularity property, a block-wise structure that has been thoroughly studied by Esser and Santini (Crypto'24) in the context of the Syndrome Decoding Problem. Such structured regularity can often be leveraged to design efficient protocols and enable new functionalities. In this work, we revisit these two long-conflated s and initiate a systematic study of the regularity in the realm of .
In the worst-case setting, we develop a novel ISD-based framework for . When and for the regular and non-regular cases, respectively, the proposed algorithms surpass the worst-case complexity of . Through numerical optimization, we heuristically demonstrate that for any constant , the advanced ISD algorithms such as BJMM achieve an asymptotic complexity superior to the birthday bound when applied to density-one instances. Our results disprove the average-case-to-worst-case - conjecture when is non-constant (e.g., linear in ). In the average-case regime, we fill in theoretical gaps in solving the single-list and show that the regular variant exhibits a -factor difference in the exponent, which extends naturally to the - problem and offers new insights into its complexity.
We analyze the impact of regularity on incremental hash and propose a new collision attack against the ID-based incremental hash (Eurocrypt'97). Our attack achieves an asymptotic time complexity of , significantly improving upon Wagner's previous bound of (Crypto'02). Applying our attack to , we reduce its security lower bound from to . In the realm of , the index-pointer technique has significantly weakened its ASIC-resistance. To address this, we propose , a PoW with enhanced ASIC-resistance and a smaller solution size, rigorously aligned with the regular -list .
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