Secret Caching Sauce for High-Performance Secure Memory
Xu Jiang, Xueliang Wei, Yifei Qu, Dan Feng, Yulai Xie, Wei Tong
Abstract
In modern secure memory systems, confidentiality and integrity protection add additional metadata (called security metadata) that are accessed during memory data accesses. Security metadata are cached in on-chip metadata caches to reduce the access cost. However, prior studies overlook the differences between security metadata caching and data caching. Metadata caches are managed similarly to data caches. We identify three special features of security metadata caching. Due to these features, existing management methods face two problems. First, there are frequent security metadata accesses and many metadata cache misses, because the best metric (i.e., reuse distance) used to select replacement victims in data caches is suboptimal for metadata caches. Second, the miss penalty is large since misses suffer from long security metadata update and verification chains. The two problems significantly increase data access latency, thereby degrading system performance. We propose SECRET, a security metadata oriented cache management framework. SECRET reduces accesses and misses by selecting victims based on a new metric superior to reuse distances, called the connections between cached security metadata. We identify this metric by developing an optimal replacement decision search approach and analyzing the optimal decisions. SECRET reduces the miss penalty by actively breaking update chains and parallelizing verification chains. Experimental results show that SECRET reduces the data read (write) latency byand improves system performance by 26.2 % compared with the state-of-the-art designs.
Ask about this paper
Ask your agent about it.
Lune has read the top-tier papers around this one, so every answer names the papers it rests on.
Your agent calls
Lunesearch_papers
Free to start. No credit card required.
Terminal
Install the CLIlune papers get 9612226a-c97b-4317-a75c-dfdd198e4162Related papers
- SecPB: Architectures for Secure Non-Volatile Memory with Battery-Backed Persist BuffersAlexander Freij, Huiyang Zhou, Yan SolihinHPCA 2023 · 8 citations
- Compact Leakage-Free Support for Integrity and ReliabilityMeysam Taassori, Rajeev Balasubramonian, Siddhartha Chhabra, Alaa R. Alameldeen et al.ISCA 2020 · 22 citations
- Plutus: Bandwidth-Efficient Memory Security for GPUsRahaf Abdullah, Huiyang Zhou, Amro AwadHPCA 2023 · 13 citations
- MetaLeak: Uncovering Side Channels in Secure Processor Architectures Exploiting MetadataMd Hafizul Islam Chowdhuryy, Hao Zheng, Fan YaoISCA 2024 · 3 citations
- Aria: Tolerating Skewed Workloads in Secure In-memory Key-value StoresFan Yang, Youmin Chen, Youyou Lu, Qing Wang et al.ICDE 2021 · 7 citations
