Achieving Precise Host Congestion Mitigation by DPU Offloading
Haifeng Zhou, Di Wang, Dianxing Tang, Xi Sun, Tao Zhang, Zhengyan Zhou, Chunming Wu
Abstract
As applications with high bandwidth and computation are increasingly deployed in data centers, host congestion emerges with significant packet drops and tail latency increases, which is on account of the contention on memory bandwidth between the NIC and CPU. In this paper, we propose a precise approach to mitigate the host congestion by offloading partial mitigation logic to DPU to significantly avoid packet loss and tail latency inflation. Our primary idea is to collect host congestion signals and perform corresponding precise congestion mitigation strategies in DPU. To this end, we first collect the signals in the Linux kernel reflecting different congestion levels, and share them with DPU through the memory sharing mechanism. The mitigation mechanism in DPU is then designed with three ideas, i.e., latency-sensitive packets giving priority on transmission, early precise congestion notification by the ECN label, and active packet drop management. Finally, the proposed approach is evaluated by our prototype implementation on NVIDIA BlueField-3 commodity DPU. The experimental results indicate that compared to HostCC, it respectively reduces the packet loss by up to 65.5% and the tail latency by up to 34.9% in the mitigation process with low overheads.
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