Persistent Processor Architecture
Jianping Zeng, Jungi Jeong, Changhee Jung
Abstract
This paper presents PPA (Persistent Processor Architecture), simple microarchitectural support for lightweight yet performant whole-system persistence. PPA offers fully transparent crash consistency to all sorts of program covering the entire computing stack and even legacy applications without any source code change or recompilation. As a basis for crash consistency, PPA leverages so-called store integrity that preserves store operands during program execution, persists them on impending power failure, and replays the stores when power comes back. In particular, PPA realizes the store integrity via hardware by keeping the operands in a physical register file (PRF), though the stores are committed. Such store integrity enforcement leads to region-level persistence, i.e., whenever PRF runs out, PPA starts a new region after ensuring that all stores of the prior region have already been written to persistent memory. To minimize the pipeline stall across regions, PPA writes back the stores of each region asynchronously, overlapping their persistence latency with the execution of other instructions in the region. The experimental results with 41 applications from SPEC CPU2006/2017, SPLASH3, STAMP, WHISPER, and DOE Mini-apps show that PPA incurs only a 2% average run-time overhead and a 0.005% areal cost, while the state-of-the-art work suffers a 26% overhead along with prohibitively high hardware and energy costs.
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Install the CLIlune papers fulltext 682d8bdd-f8cb-4eb8-8179-3f8d2e7a1698Cited by top-tier papers6
- SweepCache: Intermittence-Aware Cache on the CheapYuchen Zhou, Jianping Zeng, Jungi Jeong, Jongouk Choi et al.MICRO 2023 · 15 citations
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- Rethinking Dead Block Prediction for Intermittent ComputingGan Fang, Changhee JungHPCA 2025 · 6 citations
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