An FPGA-Compatible TRNG with Ultra-High Throughput and Energy Efficiency
Zhaojun Lu, Houjia Qidiao, Qidong Chen, Zhenglin Liu, Jiliang Zhang
Abstract
In this paper, we design an energy-efficient true random number generator with ultra-high throughput for FPGA. Only four ring oscillators constructed using eight LUTs are sampled by multiple sampling points to fully exploit the randomness of the entropy source, which provides high-quality and over 275 Mbps random sequences while consuming 13 slices. An end-to-end implementation and testing framework is tailored for easy deployment and portability on Xilinx 7 serials FPGAs. The proposed architecture passes the NIST SP 800-22 and 800-90B tests without post-processing and outperforms the state-of-the-art in terms of minimum entropy and energy efficiency.
Ask about this paper
Ask your agent about it.
Lune has read the top-tier papers around this one, so every answer names the papers it rests on.
Your agent calls
Lunesearch_papers
Free to start. No credit card required.
Terminal
Install the CLIlune papers get 384bd9a0-7220-40b9-a337-9e98c0cd96f6Cited by top-tier papers1
Ask how each one uses itRelated papers
- QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM ChipsAtaberk Olgun, Minesh Patel, Abdullah Giray Yaglikçi, Haocong Luo et al.ISCA 2021 · 49 citations
- S2RAM PUF: An Ultra-low Power Subthreshold SRAM PUF with Zero Bit Error RateLi Ni, Jiliang ZhangDAC 2024 · 28 citations
- DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number GeneratorsF. Nisa Bostanci, Ataberk Olgun, Lois Orosa, Abdullah Giray Yaglikçi et al.HPCA 2022 · 19 citations
- An Efficient and Scalable Hardware Architecture for Number Theoretic Transform on FPGA with Design AutomationYilan Zhu, Geng Yang, Xingyu Tian, Dilshan Kumarathunga et al.HPCA 2026 · 1 citation
- Hardware Support to Improve Fuzzing Performance and PrecisionRen Ding, Yonghae Kim, Fan Sang, Wen Xu et al.CCS 2021 · 9 citations
