RSQP: Problem-specific Architectural Customization for Accelerated Convex Quadratic Optimization
Maolin Wang, Ian McInerney, Bartolomeo Stellato, Stephen P. Boyd, Hayden Kwok-Hay So
Abstract
Convex optimization is at the heart of many performance-critical applications across a wide range of domains. Although many high-performance hardware accelerators have been developed for specific optimization problems in the past, designing such accelerator is a challenging task and the resulting computing architecture is often so specific to the targeted application that they can hardly be reused even in a related application within the same domain. To accelerate general-purpose optimization solvers that must operate on diverse user input during run time, an ideal hardware solver should be able to adapt to the provided optimization problem dynamically while achieving high performance and power-efficiency. In this work, a hardware-accelerated general-purpose quadratic program solver, called RSQP, with reconfigurable functional units and data path that facilitate problem-specific customization is presented. RSQP uses a string-based encoding to describe the problem structure with fine granularity. Based on this encoding, functional units and datapath customized to the sparsity pattern of the problem are created by solving a dictionary-based lossless string compression problem and a mixed integer linear program respectively. RSQP has been integrated to accelerate the general-purpose quadratic programming solver OSQP and has been tested using an extensive benchmark with 120 optimization problems from 6 application domains. Through architectural customization, RSQP achieves up to 7× performance improvement over its baseline generic design. Furthermore, when compared with a CPU and a GPU-accelerated implementation, RSQP achieves up to 31.2× and 6.9× end-to-end speedup on these benchmark programs, respectively. Finally, the FPGA accelerator operates at up to 6.6× lower dynamic power consumption and up to 22.7× higher power efficiency over the GPU implementation, making it an attractive solution for power-conscious datacenter applications.
Ask about this paper
Your agent reads all of it.
Lune indexed this paper to the last equation, along with the top-tier papers that cite it. Ask a question and the answer quotes them.
Your agent calls
Luneget_paper_fulltext
Free to start. No credit card required.
Terminal
Install the CLIlune papers fulltext 1821a59e-136d-47ec-84e7-e4bdb2e82c33Cited by top-tier papers2
- Azul: An Accelerator for Sparse Iterative Solvers Leveraging Distributed On-Chip MemoryAxel Feldmann, Courtney Golden, Yifan Yang, Joel S. Emer et al.MICRO 2024 · 7 citations
- Multi-Issue Butterfly Architecture for Sparse Convex Quadratic ProgrammingMaolin Wang, Ian McInerney, Bartolomeo Stellato, Fengbin Tu et al.MICRO 2024 · 2 citations
Related papers
- Accelerating Quadratic Optimization with Reinforcement LearningJeffrey Ichnowski, Paras Jain, Bartolomeo Stellato, Goran Banjac et al.NeurIPS 2021 · 62 citations
- HeteroSVD: Efficient SVD Accelerator on Versal ACAP with Algorithm-Hardware Co-DesignXinya Luan, Zhe Lin, Kai Shi, Jianwang Zhai et al.DAC 2025 · 1 citation
- A Hardware-Software Design Framework for SpMV Acceleration with Flexible Access Pattern PortfolioZhenyu Wu, Maolin Wang, Hayden Kwok-Hay SoHPCA 2025 · 1 citation
- NASOQ: numerically accurate sparsity-oriented QP solverKazem Cheshmi, Danny M. Kaufman, Shoaib Kamil, Maryam Mehri DehnaviSIGGRAPH 2020 · 29 citations
- SPARK: Sparsity Aware, Low Area, Energy-Efficient, Near-memory Architecture for Accelerating Linear Programming ProblemsSiddhartha Raman Sundara Raman, Lizy Kurian John, Jaydeep P. KulkarniHPCA 2025 · 2 citations
