BoolE: Exact Symbolic Reasoning via Boolean Equality Saturation
Jiaqi Yin, Zhan Song, Chen Chen, Qihao Hu, Cunxi Yu
Abstract
Boolean symbolic reasoning for gate-level netlists is a critical step in verification, logic and datapath synthesis, and hardware security. Specifically, reasoning datapath and adder tree in bit-blasted Boolean networks is particularly crucial for verification and synthesis, and challenging. Conventional approaches either fail to accurately (exactly) identify the function blocks of the designs in gate-level netlist with structural hashing and symbolic propagation, or their reasoning performance is highly sensitive to structure modifications caused by technology mapping or logic optimization. This paper introduces BoolE, an exact symbolic reasoning framework for Boolean netlists using equality saturation. BoolE optimizes scalability and performance by integrating domain-specific Boolean ruleset for term rewriting. We incorporate a novel extraction algorithm into BoolE to enhance its structural insight and computational efficiency, which adeptly identifies and captures multi-input, multi-output high-level structures (e.g., full adder) in the reconstructed e-graph. Our experiments show that BoolE surpasses state-of-the-art symbolic reasoning baselines, including the conventional functional approach (ABC) and machine learning-based method (Gamora). Specifically, we evaluated its performance on various multiplier architecture with different configurations. Our results show that BoolE identifies and more exact full adders than ABC in carry-save array and Booth-encoded multipliers, respectively. Additionally, we integrated BoolE into multiplier formal verification tasks, where it significantly accelerates the performance of traditional formal verification tools using computer algebra, demonstrated over four orders of magnitude runtime improvements.
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Cited by top-tier papers2
- HEC: Equivalence Verification Checking for Code Transformation via Equality SaturationJiaqi Yin, Zhan Song, Nicolas Bohm Agostini, Antonino Tumeo et al.USENIX ATC 2025 · 8 citations
- Equality Saturation for Quantum Circuit OptimizationGanxiang Yang, Paige Raun, Runzhou Tao, Ronghui GuPLDI 2026
Builds on8
- egg: Fast and extensible equality saturationMax Willsey, Chandrakana Nandi, Yisu Remy Wang, Oliver Flatt et al.POPL 2021 · 170 citations
- DeepGate: learning neural representations of logic gatesMin Li, Sadaf Khan, Zhengyuan Shi, Naixing Wang et al.DAC 2022 · 55 citations
- Better Together: Unifying Datalog and Equality SaturationYihong Zhang, Yisu Remy Wang, Oliver Flatt, David Cao et al.PLDI 2023 · 38 citations
- Gamora: Graph Learning based Symbolic Reasoning for Large-Scale Boolean NetworksNan Wu, Yingjie Li, Cong Hao, Steve Dai et al.DAC 2023 · 35 citations
- Less is More: Hop-Wise Graph Attention for Scalable and Generalizable Learning on CircuitsChenhui Deng, Zichao Yue, Cunxi Yu, Gokce Sarar et al.DAC 2024 · 22 citations
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