FPT: A Fixed-Point Accelerator for Torus Fully Homomorphic Encryption

Fully Homomorphic Encryption (FHE) is a technique that allows computation on encrypted data. It has the potential to drastically change privacy considerations in the cloud, but high computational and memory overheads are preventing its broad adoption. TFHE is a promising Torus-based FHE scheme that heavily relies on bootstrapping, the noise-removal tool invoked after each encrypted logical/arithmetical operation. We present FPT, a Fixed-Point FPGA accelerator for TFHE bootstrapping. FPT is the first hardware accelerator to heavily exploit the inherent noise present in FHE calculations. Instead of double or single-precision floating-point arithmetic, it implements TFHE bootstrapping entirely with approximate fixed-point arithmetic. Using an in-depth analysis of noise propagation in bootstrapping FFT computations, FPT is able to use noise-trimmed fixed-point representations that are up to 50% smaller than prior implementations that prefer floating-point or integer FFTs. FPT is built as a streaming processor inspired by traditional streaming DSPs: it instantiates directly cascaded high-throughput computational stages, with minimal control logic and routing networks. We explore different throughput-balanced compositions of streaming kernels with a user-configurable streaming width in order to construct a full bootstrapping pipeline. Our proposed approach allows 100% utilization of arithmetic units and requires only a small bootstrapping key cache, enabling an entirely computebound bootstrapping throughput of 1 BS / 35𝜇s. This is in stark contrast to the established classical CPU approach to FHE bootstrapping acceleration, which is typically constrained by memory and bandwidth. FPT is fully implemented and evaluated as a bootstrapping FPGA kernel for an Alveo U280 datacenter accelerator card. FPT achieves two to three orders of magnitude higher bootstrapping throughput than existing CPU-based implementations, and 2.5× higher throughput compared to recent ASIC emulation experiments. CCS CONCEPTS • Security and privacy → Cryptography; • Hardware → Very large scale integration design; • Computer systems organization → Architectures. Client Cloud 𝐸𝑛𝑐 ( 𝒙 ) 𝐸𝑛𝑐 ( 𝒇 (𝒙 ) ) FPT: FPGA Acceleration Figure 1: In FHE applications, critical computations occur on a cloud server over encrypted data. The server cannot decrypt the data, ensuring its privacy during computation. Decryption is solely possible by the client. Despite being slow, FHE enables previously impossible applications, at least impossible with the same level of security. FPT -our proposed FPGA accelerator for cloud servers-makes FHE practical by boosting computation speed.