Dorado: Scaling SmartNIC Session Tables on Commodity DDRs
Heng Yu, Kai Ren, Jiajun Liang, Baozeng Zhang, Guozhi Lin, Xinyi Zhang, Jian Wang, Jian Zhao, Ziyue Zhai, Liang Wang, Chao Pei, Jilong Wang
Abstract
FPGA-based SmartNICs are widely deployed for cloud network function acceleration, but their memory subsystem is under increasing pressure because of large session tables. Conventional wisdom suggests that high packet processing performance relies on advanced memories (e.g., SRAM, HBM), but those are costly to add at cloud scale. Dorado is a novel design that scales SmartNIC session tables entirely on inexpensive DDR modules. At the heart of Dorado are three new techniques that extract commodity DDR performance by restructuring session table layout, decomposing processing pipelines to reduce locking, and scheduling memory accesses to minimize stalls. Our testbed results show that Dorado improves packet processing rates by 33%, even with fewer hardware resources. Further, we have deployed Dorado to millions of servers, processing network traffic from billions of users on a large public cloud for over three years. Our production results show that Dorado can accommodate up to 16M session entries, reduce memory cost by 80%, while enabling 50Mpps line-rate processing.
Ask about this paper
Ask your agent about it.
Lune has read the top-tier papers around this one, so every answer names the papers it rests on.
Your agent calls
Lunesearch_papers
Free to start. No credit card required.
Terminal
Install the CLIlune papers get 00008613-29c4-4eee-b186-b237088c5cbaRelated papers
- Fornax: A Hardware-Centric Session Management in Large Public Cloud NetworkHeng Yu, Jian Wang, Jian Zhao, Kai Ren et al.SIGCOMM 2025 · 4 citations
- The benefits of general-purpose on-NIC memoryBoris Pismenny, Liran Liss, Adam Morrison, Dan TsafrirASPLOS 2022 · 28 citations
- ZOC: Elastic and Cost-Efficient Virtual SmartNIC Architecture for Cloud Physical MachinesNaixuan Guan, Xiaokang Hu, Yisheng Xie, Xishi Qiu et al.NSDI 2026
- AlNiCo: SmartNIC-accelerated Contention-aware Request Scheduling for Transaction ProcessingJunru Li, Youyou Lu, Qing Wang, Jiazhen Lin et al.USENIX ATC 2022 · 17 citations
- Dorado: Clustered Hardware Cache Coherence for 1,000+ CoresJovan Stojkovic, Abraham Farrell, Gerasimos Gerogiannis, Zhangxiaowen Gong et al.ISCA 2026 · 1 citation
