μCFI: Formal Verification of Microarchitectural Control-flow Integrity
Katharina Ceesay-Seitz, Flavien Solt, Kaveh Razavi
摘要
Formal verification of hardware often requires the creation of clockcycle accurate properties that need tedious and error-prone adaptations for each design. Property violations further require attention from verification engineers to identify affected instructions. This oftentimes manual effort hinders the adoption of formal verification at scale. This paper introduces Microarchitectural Control-Flow Integrity (𝜇CFI), a new general security property that can capture multiple classes of vulnerabilities under different threat models, most notably the microarchitectural violation of constanttime execution and (micro-)architectural vulnerabilities that allow an attacker to hijack the (architectural) control flow. We show a novel approach for the verification of 𝜇CFI using a single property that checks for information flows from instruction operands to the program counter by injecting taint at appropriate clock cycles. To check arbitrary sequences of instructions and associate property violations to a specific Instruction Under Verification (IUV), we propose techniques for declassifying tainted data when it is being written to registers and forwarded from the IUV through architecturally known paths. We show that our verification approach is low effort (e.g., requires tagging six signals) while capturing all interactions between unbounded sequences of instructions in the extended threat model of 𝜇CFI. We verify four RISC-V CPUs against 𝜇CFI and prove that 𝜇CFI is satisfied in many cases while detecting five new security vulnerabilities (4 CVEs), three of which are in Ibex, which has already been checked by state-of-the-art verification approaches. CCS Concepts • Security and privacy → Logic and verification.
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引用它的顶会 Paper5
- FastPath: A Hybrid Approach for Efficient Hardware Security VerificationLucas Deutschmann, Andres Meza, Dominik Stoffel, Wolfgang Kunz 等DAC 2025 · 被引用 3 次
- Fuzzing Open-Source GPU Hardware with SIMT Program GenerationZibo Gao, Jie Wang, Qihang Zhou, Lixiao Shan 等USENIX Security 2026
- Encarsia: Evaluating CPU Fuzzers via Automatic Bug InjectionMatej Bölcskei, Flavien Solt, Katharina Ceesay-Seitz, Kaveh RazaviUSENIX Security 2025
- Synthesis of Sound and Precise Leakage Contracts for Open-Source RISC-V ProcessorsZilong Wang, Gideon Mohr, Klaus von Gleissenthall, Jan Reineke 等CCS 2025
- MileSan: Detecting Exploitable Microarchitectural Leakage via Differential Hardware-Software Taint TrackingTobias Kovats, Flavien Solt, Katharina Ceesay-Seitz, Kaveh RazaviCCS 2025
它引用的顶会 Paper42
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- Meltdown: Reading Kernel Memory from User SpaceMoritz Lipp, Michael Schwarz, Daniel Gruss, Thomas Prescher 等USENIX Security 2018 · 被引用 1,456 次
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- ASLR on the Line: Practical Cache Attacks on the MMUBen Gras, Kaveh Razavi, Erik Bosman, Herbert Bos 等NDSS 2017 · 被引用 276 次
- Verifying Constant-Time ImplementationsJosé Bacelar Almeida, Manuel Barbosa, Gilles Barthe, François Dupressoir 等USENIX Security 2016 · 被引用 274 次
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