USENIX Security2025Top-tier venue
H2O2RAM: A High-Performance Hierarchical Doubly Oblivious RAM
Leqian Zheng, Zheng Zhang, Wentao Dong, Yao Zhang, Ye Wu, Cong Wang
Abstract
The combination of Oblivious RAM (ORAM) with Trusted Execution Environments (TEE) has found numerous real-world applications due to their complementary nature. TEEs alleviate the performance bottlenecks of ORAM, such as network bandwidth and roundtrip latency, and ORAM provides general-purpose protection for TEE applications against attacks exploiting memory access patterns. The defining property of this combination, which sets it apart from traditional ORAM designs, is its ability to ensure that memory accesses, both inside and outside of TEEs, are made oblivious, thus termed doubly oblivious RAM (ORAM). Efforts to develop ORAM with enhanced performance are ongoing. In this work, we propose HORAM, a high-performance doubly oblivious RAM construction. The distinguishing feature of our approach, compared to the existing tree-based doubly oblivious designs, is its first adoption of the hierarchical framework that enjoys inherently better data locality and parallelization. While the latest hierarchical solution, FutORAMa, achieves concrete efficiency in the classic client-server model by leveraging a relaxed assumption of sublinear-sized client-side private memory, adapting it to our scenario poses challenges due to the conflict between this relaxed assumption and our doubly oblivious requirement. To this end, we introduce several new efficient oblivious components to build a high-performance hierarchical ORAM (HORAM). We implement our design and evaluate it on various scenarios. The results indicate that HORAM reduces execution time by up to times and saves memory usage by times compared to state-of-the-art solutions.
Ask about this paper
Your agent reads all of it.
Lune indexed this paper to the last equation, along with the top-tier papers that cite it. Ask a question and the answer quotes them.
Cited by top-tier papers2
- Hoss: Fast Oblivious Semantic Search with Heterogeneous GPU-CPU-TEE ArchitectureJianzhang Du, Weijie Huang, Chenghong Wang, Nicolas Tsagareli et al.CCS 2026
- SONIC: Concurrent Oblivious RAM & Data Structures for Low-Latency and High-ThroughputNihal Talur, Ioannis DemertzisUSENIX Security 2026
Builds on35
- Foreshadow: Extracting the Keys to the Intel SGX Kingdom with Transient Out-of-Order ExecutionJo Van Bulck, Marina Minkin, Ofir Weisse, Daniel Genkin et al.USENIX Security 2018 · 1,175 citations
- Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch ShadowingSangho Lee, Ming-Wei Shih, Prasun Gera, Taesoo Kim et al.USENIX Security 2017 · 536 citations
- Plundervolt: Software-based Fault Injection Attacks against Intel SGXKit Murdock, David F. Oswald, Flavio D. Garcia, Jo Van Bulck et al.S&P 2020 · 369 citations
- Telling Your Secrets without Page Faults: Stealthy Page Table-Based Attacks on Enclaved ExecutionJo Van Bulck, Nico Weichbrodt, Rüdiger Kapitza, Frank Piessens et al.USENIX Security 2017 · 316 citations
- ROTE: Rollback Protection for Trusted ExecutionSinisa Matetic, Mansoor Ahmed, Kari Kostiainen, Aritra Dhar et al.USENIX Security 2017 · 249 citations
Related papers
- MegaBlocks: Breaking the Logarithmic I/O-Overhead Barrier for Oblivious RAMGilad Asharov, Eliran Eiluz, Ilan Komargodski, Wei-Kai LinCCS 2025
- Bulkor: Enabling Bulk Loading for Path ORAMXiang Li, Yunqian Luo, Mingyu GaoS&P 2024 · 8 citations
- LatORAM: ORAMs from Lateral Stashes and Delayed ShufflingSarvar Patel, Giuseppe Persiano, Joon Young Seo, Kevin YeoS&P 2026
- Multi-Range Supported Oblivious RAM for Efficient Block Data RetrievalYuezhi Che, Rujia WangHPCA 2020 · 16 citations
- MC-ORAM: A Mask-Assisted and Counter-Based Non-Deterministic ORAM Inside VM-Based TEEsYongqin Wang, Rachit Rajat, Jonghyun Lee, Mengyuan Li et al.ISCA 2026
