Evolving Graph Structured Programs for Circuit Generation with Large Language Models

Logic synthesis (LS), which aims to generate a compact logic circuit graph with minimized size while accurately satisfying a given functionality, plays an important role in chip design. However, existing LS methods struggle to balance circuit structure compactness and functional accuracy, often leading to suboptimal generation. To address this problem, we propose a novel Circuit Program Evolution framework, namely CircuitEvo, which iteratively leverages the large language models (LLMs) to evolve circuit programs towards improved compactness while preserving functional accuracy. Specifically, CircuitEvo models the circuit graph as a structured program and leverages the strong generative capabilities of LLMs-guided by the domain-specific evolutionary prompt strategies-to generate promising circuit candidates in each iteration. Moreover, a structure-aware circuit optimization module is introduced to correct functional discrepancies by appending necessary substructures to the generated circuits. To the best of our knowledge, CircuitEvo is the first LLM-based LS approach that can iteratively improve the circuit's compactness while ensuring functional accuracy. Experiments on several widely used benchmarks demonstrate that our CircuitEvo can efficiently generate accurate circuits with up to 16 input number and 69 output number. Moreover, our method significantly outperforms state-of-the-art methods in terms of the circuit size, achieving an average improvement of 6.74%. The code is available at https://github.com/MIRALab-USTC/CircuitEvo .